1. Field of the Invention
This invention relates to read-write circuitry for semiconductor memories.
2. Description of the Prior Art
Single transistor storage cells have been recently utilized to implement random access memories. The single transistor storage cells usually include a MOSFET having its gate connected to a selection conductor, its drain connected to a sense-write conductor and its source connected to a storage node. The storage cell also includes a storage capacitor connected between the storage node and a common voltage supply conductor. In order to achieve a large number of storage cells in a small amount of semiconductor chip area it is desirable that the storage capacitor be very small. A plurality of such storage cells are connected to a single sense-write conductor and thereby comprise one row of many rows forming a rectangular array of storage cells. Consequently, the capacitance associated with the sense-write conductor is very large compared to that of the storage capacitor of each storage cell. Sensing is accomplished by selection of the storage cell by turning on the MOSFET, and causing the charge stored on the storage capacitor of the selected storage cell to be redistributed to the capacitance of the sense-write conductor, resulting in a relatively small voltage transition of the sense-write conductor. Consequently, sensitive sense amplifiers have been developed which are capable of sensing and amplifying such small voltage transitions. Read-write circuitry is normally coupled directly to the sense-write conductors. However, such read-write circuitry increases the capacitance of the sense-write conductor even more, and reduces the size of the voltage transition achieved by selecting a storage cell. Heretofore, the solution has been to increase the size of the storage capacitor of each storage cell, thereby increasing the size and cost of the semiconductor memory or by increasing the sensitivity of the sense amplifier, which normally involves more complex, more area consuming, and consequently, more expensive sense amplifier circuitry, which in turn increases the cost of the memory product.